Journal Article


A VGA linearity improvement technique for ECG analog front-end in 65nm CMOS

Abstract

This paper presents a 65nm CMOS low-power, highly linear variable gain amplifier (VGA) suitable for biomedical applications. Typical biological signal amplitudes are in the 0.5-100mV range, and therefore require circuits with a wide dynamic range. Existing VGA architectures mostly exhibit a poor linearity, due to very low local feedback loopgain. A technique to increase the loop-gain has been explored by adding additional feedback to the tail current source of the input differential pair. Stability analysis of the proposed technique was undertaken with pole-zero analysis. A prototype of Analog Front End (AFE) has been designed to provide 25-50dB gain, and post-layout simulations showed a 15dB reduction in the harmonic distortion for 20mV pk-pk input signal compared to the conventional architecture. The circuit occupies 3,108μm2 silicon area and consumes 0.43μA from a 1.2V power supply.

Attached files

Authors

Nagulapalli, Rajasekhar
Hayatleh, Khaled
Barker, Steve

Oxford Brookes departments

School of Engineering, Computing and Mathematics

Dates

Year of publication: 2019
Date of RADAR deposit: 2019-08-09


Creative Commons License This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License


Related resources

This RADAR resource is the Accepted Manuscript of A VGA Linearity improvement technique for ECG analog front-end in 65nm CMOS

Details

  • Owner: Joseph Ripp
  • Collection: Outputs
  • Version: 1 (show all)
  • Status: Live