Journal Article


A 261mV bandgap reference based on beta multiplier with 64ppm

Abstract

In this paper, a low voltage bandgap reference circuit has been proposed. The introduction of a modified beta multiplier bias circuit decreased the mismatch caused by the PMOS transistors opamp contribution. By shifting the fixed resistors to the NMOSs drain side, the beta multiplier bias was able to minimise threshold mismatch between the two NMOS transistors. A 200-point MC simulation showed 0.9mV standard deviation, with a 0.34% accuracy. The simulated temperature coefficient was 64ppm/0C. The proposed circuit consumed 5.04µW of power from a 0.45V power supply voltage. A prototype was implemented in 65nm CMOS technology occupying a 2888µm2 silicon area, with the nominal value of the reference at 261mV.

Attached files

Authors

Nagulapalli, R.
Yassine, Nabil
Barker, Stephen
Georgiou P.
Hayatleh, Khaled

Oxford Brookes departments

School of Engineering, Computing and Mathematics

Dates

Year of publication: 2021
Date of RADAR deposit: 2021-08-02


Creative Commons License This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License

Details

  • Owner: Joseph Ripp
  • Collection: Outputs
  • Version: 1 (show all)
  • Status: Live