This paper explains the hidden positive feedback in the two-stage fully differential amplifier through external feedback resistors, and possible DC latch-up during the amplifier start-up. The biasing current selection among the cascode branches have been explained intuitively, With reference to previous literature. To avoid the latch-up problem irrespective of the transistor bias currents a novel, hysteresis based start-up circuit is proposed. An 87dB, 250MHz unity gain bandwidth amplifier has been developed in 65nm CMOS Technology and post-layout simulations demonstrate no start-up failures out of 1000 Monte-Carlo (6-Sigma) simulations. The circuit draws 126uA from a 1.2V supply and occupies the 2184um2 area.
Nagulapalli, RajasekharHayatleh, KhaledBarker, Steve
Yassine, BilalZourob, SaddamRaparthy, S.Yassine, Nabil
Faculty of Technology, Design and Environment\School of Engineering, Computing and Mathematics
Year of publication: 2018Date of RADAR deposit: 2018-10-15
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